cli/q
1
0
Fork 0
Code Issues Pull requests Releases Activity

Implemented if statements

Browse source
This commit is contained in:
Eduard Urbach 2024-07-07 12:30:57 +02:00
parent c139dced9e
commit 962a362578
Signed by: eduard
GPG key ID: 49226B848C78F6C8
16 changed files with 280 additions and 14 deletions
Download patch file Download diff file Expand all files Collapse all files

6
src/build/arch/x64/Registers.go
View file

@ -22,8 +22,8 @@ const (
)
var (
CallRegisters = SyscallRegisters
GeneralRegisters = []cpu.Register{RCX, RBX, RBP, R11, R12, R13, R14, R15}
SyscallRegisters = []cpu.Register{RAX, RDI, RSI, RDX, R10, R8, R9}
ReturnValueRegisters = []cpu.Register{RAX, RCX, R11}
GeneralRegisters = []cpu.Register{RCX, RBX, RBP, R11, R12, R13, R14, R15}
CallRegisters = SyscallRegisters
ReturnValueRegisters = SyscallRegisters
)