Implemented division

src/build/arch/x64/Div.go

@@ -0,0 +1,20 @@
+package x64
+
+import "git.akyoto.dev/cli/q/src/build/cpu"
+
+// DivReg divides RDX:RAX by the value in the register.
+func DivReg(code []byte, divisor cpu.Register) []byte {
+	rex := byte(0x48)
+
+	if divisor >= 8 {
+		rex++
+		divisor -= 8
+	}
+
+	return append(
+		code,
+		rex,
+		0xF7,
+		0xF8+byte(divisor),
+	)
+}